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SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
5.14 Inter-IC Sound (I2S)
The device I2S peripherals allow serial transfer of full-duplex streaming data, usually audio data, between
the device and an external I2S peripheral device such as an audio codec.
The device supports 4 independent dual-channel I2S peripherals, each with the following features:
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5.14.1
Full-duplex (transmit and receive) dual-channel communication
Double buffered data registers that allow for continuous data streaming
I2S/Left-justified and DSP data format with a data delay of 1 or 2 bits
Data word-lengths of 8, 10, 12, 14, 16, 18, 20, 24, or 32 bits
Ability to sign-extend received data samples for easy use in signal processing algorithms
Programmable polarity for both frame synchronization and bit clocks
Stereo (in I2S/Left-justified or DSP data formats) or mono (in DSP data format) mode
Detection of over-run, under-run, and frame-sync error conditions
I2S Peripheral Register Descriptions
Table 5-32. I2S0 Registers
HEX ADDRESS
RANGE
2800h
2804h
2808h
2809h
280Ch
280Dh
2810h
2814h
2828h
2829h
282Ch
282Dh
HEX ADDRESS
RANGE
2900h
2904h
2908h
2909h
290Ch
290Dh
2910h
2914h
2928h
2929h
292Ch
292Dh
ACRONYM
I2S0SCTRL
I2S0SRATE
I2S0TXLT0
I2S0TXLT1
I2S0TXRT0
I2S0TXRT1
I2S0INTFL
I2S0INTMASK
I2S0RXLT0
I2S0RXLT1
I2S0RXRT0
I2S0RXRT1
ACRONYM
I2S1SCTRL
I2S1SRATE
I2S1TXLT0
I2S1TXLT1
I2S1TXRT0
I2S1TXRT1
I2S1INTFL
I2S1INTMASK
I2S1RXLT0
I2S1RXLT1
I2S1RXRT0
I2S1RXRT1
REGISTER NAME
I2S0 Serializer Control Register
I2S0 Sample Rate Generator Register
I2S0 Transmit Left Data 0 Register
I2S0 Transmit Left Data 1 Register
I2S0 Transmit Right Data 0 Register
I2S0 Transmit Right Data 1 Register
I2S0 Interrupt Flag Register
I2S0 Interrupt Mask Register
I2S0 Receive Left Data 0 Register
I2S0 Receive Left Data 1 Register
I2S0 Receive Right Data 0 Register
I2S0 Receive Right Data 1 Register
Table 5-33. I2S1 Registers
REGISTER NAME
I2S1 Serializer Control Register
I2S1 Sample Rate Generator Register
I2S1 Transmit Left Data 0 Register
I2S1 Transmit Left Data 1 Register
I2S1 Transmit Right Data 0 Register
I2S1 Transmit Right Data 1 Register
I2S1 Interrupt Flag Register
I2S1 Interrupt Mask Register
I2S1 Receive Left Data 0 Register
I2S1 Receive Left Data 1 Register
I2S1 Receive Right Data 0 Register
I2S1 Receive Right Data 1 Register
118
Peripheral Information and Electrical Specifications
Product Folder Links: TMS320C5515
Copyright ? 2010–2013, Texas Instruments Incorporated
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